Hazani v. International Trade Commission (JWB)

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Hazani v. U.S. International Trade Commission [1]

Description: Emanuel Hazani held a patent relating to semiconductor memory cells. Such read-only memory cells (EEPROM) are non-volatile memories, i.e. the data stored is not lost when power to the device is turned off. Hazani's patent ('904) is not explicitly limited to EEPROM semiconductor memory cells, but generally relates to semiconductor memory cell with features found in EEPROM cells.

Hazani filed a complaint with the International Trade Commission (ITC) alleging that dynamic random access memory devices (DRAMs) imported by suppliers of electronic components infringe various claims of his patent. Administrative law judge ruled that all of the claims except for claim 14 were anticipated under 35 USC 102(e) by another patent (held by Kuo), and claim 14 was not infringed by any of the accused products.

On appeal, Hazani brought up differences between his claims and Kuo's patent (the prior art). However, Hazani's new arguments differed from those originally raised with the administrative law judge, and were therefore not considered. The Court of Appeals found no legal error in the administrative law judge's determination that Hazani's arguments were untimely and could be rejected on that ground alone. Even if they had been timely, they would not have led to a different result. Similarly, the administrative law judge's rulings denying Hazani's other arguments that his patent was not anticipated were affirmed by the Court of Appeals.

Lastly, Hazani challenged the summary determination that the respondents did not infringe claim 14. The administrative law judge determined that the claims require a bit line that is entirely formed within the substrate. Hazani claimed that the bit line need only be partially formed within the substrate. The Court of Appeals affirmed the administrative law judge's interpretation.