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RC Circuit

The first part of the circuit in figure 34 consists of a resistor, $R$, and capacitor, $C$ connected in series. The circuit is shown in figure 35. The circuit is driven by a time-varying voltage $v(t)$ and we're interested in the voltage $v_c(t)$ that develops over the capacitor.

Figure 35: RC circuit
\begin{figure}\centerline{\psfig{file=figs/rc-circuit.eps,width=3in}} \end{figure}

We now assume that $v(t)$ is a $T$-periodic pwm signal. Over a single period, $[0,T]$, the input voltage to the circuit has two distinct parts. There is the "forced" part from $[0,T_1]$ during which the applied voltage is $1$. In this interval, the capacitor is being charged by the external voltage source. After this charging phase, the applied voltage drops to zero and the capacitor is discharging through its resistor.

During the "charging" phase, we can think of the RC circuit as being driven by a step function of magnitude $V$ volts. If we assume that the capacitor has an initial voltage of $V_0$ at time $t=0$ (the start of the period), then the circuit's response is simply the total response of the system. So the capacitor's voltage is given by the equation

$\displaystyle v_C(t) = V_0 e^{-t/RC} + V(1-e^{-t/RC})$     (2)

for $t \in [0,T_1]$.

During the "discharge" phase, there is no external voltage being applied to the RC circuit. This means that the system response is due solely to the capacitor voltage that was present at time ALT=. As a result the capacitor's voltage over the time interval $[T_1,T]$ is captured by the RC circuit's natural response. So the capacitor's voltage is given by the equation

$\displaystyle v_C(t) = V_1 e^{-(t-T_1)/RC}$     (3)

for $t \in [T_1,T]$. Note that $V_1$ equals the voltage on the capacitor at time ALT= (i.e., $V_1=v_C(T_1)$) and also note that we've used the term $t-T_1$ (rather than ALT=) in the exponent. This last substitution was made because equation 3 represents the response of the system starting at time ALT= rather than time $t=0$. As a result we had to shift the time origin from $0$ to ALT=. The substitution of ALT= by $t-T_1$ accomplishes this time-shift.

The top drawing in figure 36 illustrates the output signal we expect from a PWM driven RC circuit over an interval from $[0,T]$. For times ALT= beyond this interval, we expect to see the waveform shown in the bottom drawing in figure 36. In this drawing we assume that the capacitor is initially uncharged. As our circuit cycles through its charge and discharge phases, the voltage over the capacitor follows a saw-tooth trajectory that eventually reaches a steady state regime. In this steady-state region, the capacitor on the voltage zigzags between $V_0$ and $V_1$ volts. The exact value of these steady state voltages is dependent on the period $T$ and the duty cycle $T_1/T$. What we now want to do is characterize these voltages in terms of $T$ and $T_1/T$.

Figure 36: Response to PWM signal over a single period
\begin{figure}\centerline{\psfig{file=figs/pwm-response.eps,width=4.5in}} \end{figure}

To determine $V_0$ and $V_1$ at steady state, we note that $V_0$ is the capacitor's charge after the discharge phase. Since we expect the steady state behavior to be $T$-periodic, we can conclude that $V_0=v_C(0)=v_C(T)$ which means that

$\displaystyle V_0 = V_1 e^{-(T-T_1)/RC}$     (4)

In a similar way we know that $V_1$ is the cap's voltage after charging up from $V_0$ for ALT= seconds. This means that
$\displaystyle V_1 = V_0 e^{-T_1/RC} + V(1-e^{-T_1/RC})$     (5)

Equations 4 and 5 are two nonlinear equations in to unknowns. We now try to solve these equations. To start we insert equation 4 into equation 5 to obtain

$\displaystyle V_1$ $\textstyle =$ $\displaystyle V_1 e^{-(T-T_1)/RC} e^{-T_1/RC} + V(1-e^{-T_1/RC})$  
  $\textstyle =$ $\displaystyle V_1 e^{-T/RC} + V(1-e^{-T_1/RC})$ (6)

Equation 6 only has the unknown $V_1$ in it, so we can re-arrange this equation to see that
$\displaystyle V_1 = \frac{1-e^{-T_1/RC}}{1-e^{-T/RC}} V$     (7)

We now take equation 7 and back substitute it into equation 4 to obtain

$\displaystyle V_0$ $\textstyle =$ $\displaystyle \frac{1-e^{-T_1/RC}}{1-e^{-T/RC}} e^{-(T-T_1)/RC}
V = \frac{1-e^{-T_1/RC}}{1-e^{-T/RC}}
\frac{e^{T_1/RC}}{e^{T/RC}} V$  
  $\textstyle =$ $\displaystyle \frac{ e^{T_1/RC}-1}{e^{T/RC}-1} V$ (8)

Equations 8 and 7 completely characterize the steady-state "ripple" of the RC circuit in response to a PWM voltage whose period is $T$ and whose duty cycle is $T_1/T$.

Figure 37 shows two graphs characterizing the voltage, $v_C$, over the capacitor as a function of the duty cycle. In particular, these graphs assume that $V=1$ volt, $R=10$ k-ohm, $C = .01$ $\mu$F, and the period $T = 0.1$ milliseconds. We've plotted duty cycles at $0.1$ to $0.9$ in increments of $0.1$. The top graph plots $V_0$ and $V_1$. Note that these two values have a symmetry around a steady state value. The steady state value is simply the average of $V_0$ and $V_1$. We've plotted this value $V_s = (V_1+V_0)/2$ in the second graph. We've also plotted the ripple $V_{\rm ripple} = (V_1-V_0)/2$ in this graph. The important thing to note here is that the average value of the capacitor voltage varies in a linear manner with duty cycle.

Figure 37: PWM response as a function of duty cycle
\begin{figure}\centerline{\psfig{file=figs/pwm-response-chart1.eps,width=2.5in}} \end{figure}

Note that the ripple shown in figure 37 is about $0.1$ volts. Is it possible to reduce this. Intuitively we might suppose that if the period $T$ is much smaller, then there is less time to discharge to cap and this might result in a smaller ripple. To test this hypothesis, we plot the ripple as a function of PWM period, $T$. In this case, we assume that $R=10$ k-ohm, $C=0.01$ $\mu$F, $V=1$ volt, and we fix the duty cycle at 50 percent. The plots are shown in figure 38. In these plots, $T$ ranges over two decades from $0.1$ milliseconds to $10$ milliseconds. What should be apparent here is that as we decrease the period beneath $0.1$ milliseconds that the ripple in our voltage becomes negligible. This time, of course, is comparable to the RC time constant of $10^{-4}$ seconds for this circuit, which is entirely reasonable.

Figure 38: PWM response as a function of period
\begin{figure}\centerline{\psfig{file=figs/pwm-response-chart2.eps,width=2.5in}} \end{figure}

What should be apparent from the preceding discussion that the RC circuit essentially turns the pwm input signal, $v(t)$, into a constant analog voltage with a small ripple on it. We can make this ripple arbitrarily small through proper selection of the period. Moreover, we can see that the value of $v_c(t)$ is proportional to the pwm's duty cycle.

As we'll see below, it is relatively easy for the MicroStamp11 to generate a pwm signal through the use of output compare interrupts. This means that with the help of the RC circuit in figure 35, we can use the MicroStamp11 to generate an analog voltage that lies between zero and 5 volts. Moreover, we can tune this output voltage by simply tuning the duty cycle of the pwm signal. Unfortunately, there is one small problem with the circuit shown in figure 35. This problem and its solution are discussed in the next subsection.

next up previous
Next: Op-amp Buffers Up: Output Compare Interrupts Previous: How to use a
Bill Goodwine 2002-09-29